The present invention relates to a drive circuit for a magnetic recording device. More particularly, the present invention relates to a drive circuit for a magnetic hard disk drive.
FIG. 6a illustrates a conventional drive circuit 15 for driving a magnetic hard disk drive. As shown in the figure, the drive circuit 15 is connected to magnetic heads 3 to 6. The magnetic heads 3 and 4 are respectively disposed near the upper and lower surfaces of a first disk 1, and the magnetic heads 5 and 6 are respectively disposed near the upper and lower surfaces of a second disk 2. The disks 1 and 2 rotate around a rotary shaft 7, and thus, the heads 3 to 6 are capable of selectively writing and reading data to and from the surfaces of the disks 1 and 2. Generally, the magnetic heads 3 to 6 are respectively provided at the tips of swing arms (not shown) to move the heads 3 to 6 in the radial direction of the disks 1 and 2 when the swing arms move within a movable range 9. The drive circuit 15 is provided in the vicinity of the swing arms and is typically connected to the magnetic heads 3 to 6 via wires which have lengths of several centimeters. Thus, the drive circuit 15 is capable of reading and writing data to and from the disk by outputting and receiving signals to and from the heads 3 and 6 via the wires. Also, the drive circuit 15 is connected to an input/output signal bus 8 so that it can exchange signals with an external circuit such as read channel LSI.
FIG. 6b is a block diagram showing an example of the interaction between a CPU 100, a read channel LSI (i.e. a control circuit) 102, and the drive circuit 15. The CPU 100 exchanges data and commands with the read channel LSI 102, and the read channel LSI 102 inputs or outputs various signals to and from the drive circuit 15.
FIG. 7 illustrates the detailed configuration of the conventional drive circuit 15 shown in FIG. 6a and the various signals it receives from and transmits to the read channel LSI 102. As shown in the figure, the circuit 15 comprises a read/write circuit 200, a read postamplifier 23, a read/write switching circuit 34, a head selection circuit 35, and a write current generation circuit 36. Also, the read/write circuit 200 comprises write drivers 26 to 29 and read preamplifiers 30 to 33. In addition, the magnetic heads 3 to 6 respectively contain write heads 3a to 6a and read heads 3b to 6b. 
When data is written to a disk (e.g. the disk 1) via a particular write head (e.g. write head 3a), a chip selection signal 57 and a read/write selection signal 56 are supplied from an external control circuit (e.g. the read channel LSI 102) to the read/write switching circuit 34. The chip selection signal 57 enables the drive circuit 15 and sets it in an operational state, and the read/write selection signal 56 indicates whether a read operation or a write operation is to be performed. In the present example, the signal 56 indicates that a write operation is to be performed. In response to such signals 56 and 57, the switching circuit 34 outputs a read/write mode signal indicating that a write operation is to be performed.
The external control circuit also outputs a two bit head selection signal 51 and 52 to the head selection circuit 35 for selecting one of the four heads 3 to 6. The circuit 35 inputs the signal 51 and 52 and determines that the magnetic head 3 has been selected to perform a read or write operation. As a result, the circuit 35 outputs an enable signal to enable the write driver 26 and read preamplifier 30 which are connected to the magnetic head 3.
The write current generation circuit 36 inputs the read/write mode signal from the read/write switching circuit 34, a predetermined write bias current, and a write data signal 53. The predetermined write bias current is generated by connecting an external resistor 55 between the write current terminal 54 and ground. Since the read/write mode signal from the circuit 34 indicates a write mode, the generation circuit 36 outputs the predetermined write bias current based on the write data 53 to the write drivers 26 to 29. Since the enable signal output from the head selection circuit 35 enables the write driver 26, the write driver 26 drives the write head 3a with the write bias current output from the generation circuit 36 to write data to the magnetic disk 1. For example, if a logic xe2x80x9c1xe2x80x9d is to be written to the disk 1, the write driver causes the write bias current to travel in one direction through the write head 3a. On the other hand, if a logic xe2x80x9c0xe2x80x9d is to be written to the disk 1, the write driver causes the write bias current to travel in the other direction through the write head 3a. 
When current is read from a disk (e.g. the disk 1) via a particular read head (e.g. read head 3b), the chip selection signal 57 sets the drive circuit 15 in an operational state, and the read/write selection signal 56 indicates that a read operation is to be performed. As a result, the switching circuit 34 outputs a read/write mode signal indicating a read mode.
Also, the circuit 35 inputs the head selection signal 51 and 52 and determines that the magnetic head 3 has been selected to perform a read or write operation and enables the write driver 26 and read preamplifier 30. As a result, the read preamplifier 30 inputs a predetermined read current and applies a read bias current to the read head 3b based on the predetermined read current so that the head 3b reads data from the disk 1 and supplies it to the preamplifier 30. The predetermined read current is generated by connecting an external resistor 61 between the read current terminal 60 and ground.
Then, the preamplifier 30 amplifies the signal received from the head 3b and supplies the amplified signal to the postamplifier 23. The read head 3b may be a magnetic-to-electrical resistor which changes resistance based on the magnetic field applied to the resistor. Thus, when a logic xe2x80x9c0xe2x80x9d on the disk passes by the head 3b, the head 3b has one resistance, and when a logic xe2x80x9c1xe2x80x9d on the disk passes by the head 3b, the head 3b has another resistance. Thus, the read bias current flowing through the head 3b changes depending on the read data, and thus, the value of the data can be determined based on the changing current. Since the read/write mode signal from the circuit 34 indicates a read mode, the postamplifier 23 amplifies the signal from the preamplifier 30 and outputs it as read data 58 and 59.
The above example illustrates the operation of the drive circuit 15 when data is written to the disk 1 via the write head 3a and when data is read from the disk 1 via the read head 3b. Also, the circuit 15 operates in a similar manner when data is being written via the write heads 4a to 6a and when data is being read via the read heads 4b to 6b. 
Recently, increasing the storage capacity of hard disk drives has become extremely desirable. One method of increasing such capacity is to increase the frequency of the write data signal so that a larger amount of data can be stored in a fixed area of a magnetic disk. In other words, the speed at which data is written to or read from the disk is increased. The recording frequency can be raised by decreasing the inductance of the write head. However, when the inductance of the write head decreases, the level of stray inductance which will adversely affect the write operation also decreases. Specifically, the write head is unable to properly write data to the disk if the amount of stray inductance surrounding the write head exceeds 10% of the inductance of the write head itself. Therefore, by lowering the inductance of the head, the sensitivity of the head to stray inductance increases, and thus, the recording frequency of data cannot be increased beyond a certain point by lowering the inductance of the write head.
With respect to the conventional drive circuit 15 discussed above, the chip area of the circuit 15 is large because many external components must be connected to the drive circuit 15, and thus, the wiring surrounding the drive circuit 15 becomes complicated. As a result, the distance between the drive circuit 15 and the magnetic heads 3 to 6 is relatively large, and thus, a substantial amount of stray inductance is present around the heads 3 to 6. Accordingly, the size of the heads 3 to 6 cannot be significantly reduced, and the recording frequency of the drive circuit 15 cannot be significantly increased.
Specifically, as shown in FIG. 7, nine terminals are provided to connect the drive circuit 15 to the external control circuit and the resistors 55 and 61. Therefore, the size of the drive circuit must be increased to adequately separate the terminals to avoid a signal crosstalk between the signals input to and output from the terminals. Accordingly, a large amount of stray inductance exists around the drive circuit 15. In order to prevent the stray inductance from effecting the read and write operations of the heads 3 to 6, the inductance of the heads 3 to 6 must be relatively high. As a result, the storage capacity of the disk drive and recording frequency of the drive circuit 15 cannot be increased. Alternatively, the effects of the stray inductance may be avoided by separating the drive circuit 15 and the heads 3 to 6 via a large distance. However, in such case, the size of the hard disk drive cannot be made compact.
An object of the present invention is to provide a drive circuit for a magnetic recording device in which the stray capacitance and stray inductance of peripheral wiring of the drive circuit is reduced.
Another object of the present invention is to increase the read/write frequency of data of a magnetic recording device.
A further object of the present invention is to increase the recording density of the magnetic recording device.
An additional object of the present invention is to provide a drive circuit for a magnetic recording device in which the operation characteristics do not deteriorate when the peripheral wiring of the drive circuit is formed by a high-impedance metal evaporation process.
A still further object of the present invention is to provide a drive circuit for a magnetic recording device in which the write bias current and read bias current can be easily optimized to the most appropriate current value.
In order to achieve the above and other objects, a drive circuit for a magnetic recording device is provided. The drive circuit comprises: a write driver which inputs write data and outputs a corresponding writing current to a write head to store information onto a magnetic disk; a read preamplifier which supplies a bias current to a read magnetic head to sense information stored on said magnetic disk and which amplifies said information as output data; a write predriver which inputs a write data signal via a data signal line and a write mode signal and which supplies said write data to said write driver based on said write mode signal; a read postamplifier which inputs said output data and a read mode signal and which amplifies said output data to produce a read data signal based on said read mode signal; and a current signal detecting circuit which inputs an external current setting signal via said data signal line and generates a current value signal based on said external current setting signal.
In order to further achieve the above and other objects, a drive circuit for a magnetic recording device is provided. The drive circuit comprises: a write driver which is driven by said a current setting signal, inputs write data, and outputs a corresponding writing current to a write head to store information onto a magnetic disk; a read preamplifier which is driven by a bias current setting signal, supplies a bias current to a read magnetic head to sense information stored on said magnetic disk, and amplifies said information as output data; a write predriver which inputs a write data signal via a data signal line and a write mode signal and which supplies said write data to said write driver based on said write mode signal; a read postamplifier which inputs said output data and a read mode signal and which amplifies said output data to produce a read data signal based on said read mode signal; a current signal detecting circuit which inputs an external current setting signal via said data signal line and generates a current value signal based on said external current setting signal; a mode selection circuit which inputs a control signal and generates said write mode signal and said read mode signal based on said control signal; and a current setting circuit which inputs said current value signal and outputs said write current setting signal and said bias current setting signal based on said current value signal.